Product overview
The TABEBUIA T200 is a compact, industrial-grade software-defined radio board for programmable radio and signal-processing work. Its ADI AD9364 front end covers 70 MHz to 6 GHz and provides 56 MHz instantaneous bandwidth. One transmit channel and one receive channel support full-duplex communication; the T200 does not support MIMO. It is compatible with USRP B205mini. Its development uses include 5G prototyping, PHY-layer testing and small-cell development, although it does not replace commercial 5G test equipment.
The board measures 10.4 × 5.7 cm, weighs 0.04kg and requires a 5V DC input. Its architecture includes an integrated low-noise amplifier and programmable FPGA options comprising Spartan 6 XC6SLX150 and Xilinx Artix 7 75T, 100T or 200T devices. Onboard flash enables operation without a host computer when a user-developed program is provided. SMA connectors accommodate a 50-ohm SMA-compatible antenna covering the intended frequency; discone or log-periodic antennas are suggested for broadband operation. The procurement format is an SDR board with selectable FPGA versions.
The ADC and DAC each provide 12-bit resolution and sampling rates of 61.44 MSPS, with the ADC rate specified as a maximum. Maximum host transfer is 61.44 MSPS with 16-bit data. Output power is greater than 10dBm, noise figure is below 8.5dB and local oscillator accuracy is ± 2.0 ppm. An internal TCXO provides the reference clock, with an external 10 MHz reference or GPS-disciplined oscillator connection available for higher precision. Development demonstrations include GNU Radio examples for video transmission, modulation, demodulation and real-time spectrum display.
Specifications
| Specification | Value & conditions |
|---|---|
| Model and hardware format | TABEBUIA T200 Mini SDR Board; compatible with USRP B205mini |
| Radio architecture | Full-duplex communication with one transmit channel and one receive channel |
| RF integrated circuit | ADI AD9364 |
| RF frequency range | 70 MHz to 6 GHz |
| Instantaneous bandwidth | 56 MHz |
| Programmable FPGA options | Spartan 6 XC6SLX150 FPGA or Xilinx Artix 7 75T/100T/200T FPGA |
| Onboard flash | 32 million flash; supports independent operation without a host computerOperation without a host computer requires a user-developed program. |
| Low-noise amplifier | Integrated LNA suitable for small devices |
| DC input voltage | 5V |
| Maximum ADC sampling rate | 61.44 MSPS |
| Unidentified electrical parameter | -21DBM |
| ADC resolution | 12 bits |
| Output power | Greater than 10dBm |
| DAC sampling rate | 61.44 MSPS |
| Noise figure | Less than 8.5dB |
| DAC resolution | 12 bits |
| Local oscillator accuracy | ± 2.0 ppm |
| Maximum transfer rate with host | 61.44 MSPS16-bit host transfer. |
| Dimensions | 10.4 × 5.7 cm |
| Weight | 0.04kg |
| MIMO support | No MIMO support; single-channel SDR with 1 TX and 1 RX |
| Onboard signal processing | Real-time signal-processing tasks without overloading the host CPUSpartan-6 FPGA configuration. |
| Internal reference clock | TCXO |
| External reference options | 10 MHz reference or GPS-disciplined oscillator (GPSDO)External reference connection for higher precision. |
| Antenna interface | SMA connectors; 50-ohm SMA-compatible antennaThe antenna must cover the frequency of interest. |
| Suggested antenna types | Discone or log-periodic antennaBroadband applications. |
| Development demonstrations | Free demonstrations based on GNU Radio, Labwand and UHD |
| 5G development uses | 5G prototyping, PHY-layer testing and small-cell developmentDoes not replace commercial 5G test equipment. |
